In general, solar cells and photovoltaic modules based on II-VI semiconductors (e.g., CdTe) are known and exist as commercial products. However, the formation of a stable, ohmic contact to the active semiconductor has historically presented difficulties. It is noted that some non-ideal solutions to these problems exist, and such solutions have, to a greater or lesser degree, drawbacks and deficiencies. Metals are often used as ohmic contact materials for semiconductors. In general, the contact barrier height φb on a p-type semiconductor is given by the equation:
      φ    b    =                    E        g            q        +          (              χ        -                  φ          m                    )      
where Eg is the bandgap of the semiconductor, χ is its electron affinity, and φm is the work function of the metal.
In general, in order for a metal to form an ohmic contact with CdTe, and not a Schottky barrier, its work function should be equal to or greater than the sum of the electron affinity and the band gap of CdTe. CdTe has a high electron affinity (e.g., 4.4 eV) and a relatively large bandgap (e.g., 1.5 ev). If a low barrier is allowed at this interface, then the metal work function is typically required to be 5.7 eV or greater. No metals generally exist having such a large work function. For example, Au has one of the largest metal work functions (e.g., 5.1 eV). For comparison, examples of low work function metals are Cs (e.g., 2.1 eV), and Cd (e.g, 4.1 eV). A rear Schottky barrier on the CdTe having a barrier height greater than 0.3 eV will limit the current at high forward bias at room temperature. Therefore, pseudo-ohmic contacts are typically used in which the p-type CdTe is converted to p+ CdTe. The resulting narrow barrier can then be penetrated by tunneling.
Alternatively, a buffer layer (e.g., p+-ZnTe, Sb2Te3, As2Te3) can be inserted between the CdTe and the metal. It has been found that most back contact formulations create a Te-rich surface layer of the CdTe. Frequently, this reacts with the metal to form a telluride compound. Preparation of the CdTe surface prior to metal deposition frequently involves chemical etching to both remove surface oxides and to form a Cd-depleted (Te-rich) surface. Several formulations can be found in the literature.
Most formulations utilize a small quantity of Cu. For example, a 5 nm layer of Cu can be deposited, or a Au—Cu alloy can be used, or Cu-doped graphite or graphite paste. If a Cu layer is used, it is subsequently annealed at about 200 to 250° C. The Cu forms a Cu2-xTe compound at the surface. In addition some elemental Cu diffuses into the CdTe to contribute to p-type doping. Cu can result in competing effects: an improved contact and reduced series resistance, but also increased shunting and reduced shunt resistance. The use of excessive Cu has also been associated with solar cell instability and performance degradation over time and under conditions of stress. Excess Cu is usually associated with Cu accumulation in the CdS layer leading to compensation, high resistivity and noticeable photoconductivity. The choice of back metal (or rear metal electrode) is also important. Au, Al, or Ni can lead to device instability while Mo usually does not. Other possibilities include Cr or Ag paste.
Moreover, an alternative concept to the conventional three-scribe process for forming interconnected thin-film photovoltaic (PV) module structures has been described in the prior art. The concept involves patterning operations performed on the basic solar cell structure, the deposition of an insulator over the rear of the solar cell structure, and the subsequent deposition of a further conductive layer.
Thus, an interest exists for improved thin film photovoltaic devices/modules and related methods of fabrication. These and other inefficiencies and opportunities for improvement are addressed and/or overcome by the assemblies, systems and methods of the present disclosure.